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Paper ID | Paper Title | Authors | Organisation(s) |
112 | Virtual Prototype driven Design, Implementation and Evaluation of RISC-V Instruction Set Extensions | Milan FUNCK (1) Vladimir HERDT (1,2) Rolf DRECHSLER (1,2) | 1: DFKI GmbH, Germany; 2: University of Bremen, Germany |
114 | Early Performance Estimation of Embedded Software on RISC-V Processor using Linear Regression | Weiyan ZHANG (1) Mehran GOLI (1,2) Rolf DRECHSLER (1,2) | 1: DFKI GmbH, Germany; 2: University of Bremen, Germany |
116 | Processor Extensions for Hardware Instruction Replay against Fault Injection Attacks | Noura AIT MANSSOUR (1,3) Vianney LAPOTRE (2,3) Guy GOGNIAT (2,3) Arnaud TISSERAND (1,3) | 1: UBS, Lab-STICC, France; 2: Université Bretagne Sud; 3: CNRS, Lab-STICC, France |
Paper ID | Paper Title | Authors | Organisation(s) |
126 | AµFLIPS: An Asynchronous Microprocessor With FLexIbly-timed Pipeline Stages | Zaheer TABASSAM (1) Syed Rameez NAQVI (2) Andreas STEININGER (1) | 1: TU Wien, Austria; 2: CUI, Wah Campus, Pakistan |
149 | A Design Space Exploration Framework for Memristor-Based Crossbar Architecture | Mario BARBARESCHI (1) Alberto BOSIO (2) Ian O'CONNOR (2) Petr FIŠER (3) Marcello TRAIOLA (4) | 1: Department of Electrical Engineering and Information Technology, University of Naples Federico II, Naples, Italy; 2: Univ Lyon, ECL, INSA Lyon, CNRS, UCBL, CPE Lyon, INL, UMR5270, 69130 Ecully, France; 3: Czech Technical University in Prague, Czech Republic; 4: University of Rennes, Inria, CNRS, IRISA, UMR6074 |
134/S | ArithsGen: Arithmetic Circuit Generator for Hardware Accelerators | Jan KLHUFEK Vojtech MRAZEK | Brno University of Technology, Czech Republic |
Paper ID | Paper Title | Authors | Organisation(s) |
102 | Hexapod robotic system for indoor neutron and gamma radiation mapping and inspection | Antonis BANOS Yannick VERBELEN Suresh KALUVAN Chris HUTSON Matthew RYAN TUCKER Tom B. SCOTT | University of Bristol, United Kingdom |
163 | Autocalibration Approach for Improving Robustness of Analog ICs | David MALJAR Daniel ARBET Martin KOVÁČ Róbert ONDICA Viera STOPJAKOVÁ | Slovak University of Technology, Slovak Republic |
119/S | A Radiation Tolerant CML Voltage-Controlled Oscillator in 65 nm CMOS | Jaime Sebastian CARDENAS CHAVEZ (1) Cheng GU (1) Zhi Chao ZHANG (1) Riu CHEN (1) Hormoz DJAHANSHAH (2) | 1: University of Saskatchewan, Canada; 2: Microchip Technology |
162/S | On-Chip Current Sensing Approaches for DC-DC Converters | Richard RAVASZ Adam HUDEC Daniel ARBET Viera STOPJAKOVÁ | Slovak University of Technology, Slovak Republic |
Paper ID | Paper Title | Authors | Organisation(s) |
142 | Hardware Obfuscation of Digital FIR Filters | Levent AKSOY (1) Alexander HEPP (2) Johanna BAEHR (2) Samuel PAGLIARINI (1) | 1: Tallinn University of Technology, Estonia; 2: Technical University of Munich, Germany |
155 | Exploiting PUF Variation to Detect Fault Injection Attacks | Troya Cagil KOYLU Luiza CAETANO GARAFFA Cezar Rodolfo WEDIG REINBRECHT Mahdi ZAHEDI Said HAMDIOUI Mottaqiallah TAOUIL | Delft University of Technology, Netherlands, The |
139/S | Versatile Hardware Framework for Elliptic Curve Cryptography | Vít MAŠEK Martin NOVOTNÝ | Czech Technical University in Prague, Czech Republic |
141/S | Correlation Power Analysis of SipHash | Matúš OLEKŠÁK Vojtěch MIŠKOVSKÝ | Czech Technical University in Prague, Czech Republic |
Paper ID | Paper Title | Authors | Organisation(s) |
110 | Analyzing Dynamic Aspects of AxC Systems by Means of Statistical Model Checking | Josef STRNADEL | Brno University of Technology, Czech Republic |
128 | Functional Verification of Arithmetic Circuits: Survey of Formal Methods | Maciej CIESIELSKI Atif YASIN Jiteshri DASARI | University of Massachusetts, Amherst, MA, USA |
164 | On SAT-Based Model Checking of Speed-Independent Circuits | Florian HUEMER Robert NAJVIRT Andreas STEININGER | Institute for Computer Engineering, TU Wien, Vienna, Austria |
Paper ID | Paper Title | Authors | Organisation(s) |
140 | Synaptic Control for Hardware Implementation of Spike Timing Dependent Plasticity | Salah DADDINOUNOU Elena-Ioana VATAJELU | Univ. Grenoble Alpes, CNRS, Grenoble INP, TIMA, France |
125 | Programmable logic elements using multigate ambipolar transistors | Ashton SNELGROVE Pierre-Emmanuel GAILLARDON | University of Utah, USA |
136 | A Concept Towards Pressure-Controlled Microfluidic Networks | Gerold FINK (1) Medina HAMIDOVIĆ (1) Werner HASELMAYR (1) Robert WILLE (2,3) | 1: Johannes Kepler University Linz, Austria;
2: Technical University of Munich, Munich, Germany;
3: Software Competence Center Hagenberg GmbH (SCCH), Hagenberg, Austria |
Paper ID | Paper Title | Authors | Organisation(s) |
150 | Selective Hardening of Critical Neurons in Deep Neural Networks | Annachiara RUOSPO (1) Gabriele GAVARINI (1) Ilaria BRAGAGLIA (1) Marcello TRAIOLA (2) Alberto BOSIO (3) Ernesto SANCHEZ (1) | 1: Politecnico di Torino, Italy; 2: Inria, University of Rennes, CNRS, IRISA, Rennes, France; 3: Univ Lyon, ECL, INSA Lyon, CNRS, UCBL, CPE Lyon, INL, UMR5270, France |
158 | Exploring Software Models for the Resilience Analysis of Deep Learning Accelerators: the NVDLA Case Study | Alessandro VERONESI (1) Francesco DALL'OCCO (2) Davide BERTOZZI (2) Michele FAVALLI (2) Milos KRSTIC (1,3) | 1: IHP microelectronics, Germany; 2: University of Ferrara, Italy; 3: Universität Potsdam, Germany |
Paper ID | Paper Title | Authors | Organisation(s) |
104 | Fault Tolerant Synchronous Multi-Channel Buck Converter for Nuclear Inspection Instruments | VERBELEN, Yannick; BANOS, Antonios; SCOTT, Tom B. | University of Bristol, United Kingdom |
109 | Hardware Accelerated FrodoKEM on RISC-V | KARL, Patrick (1) FRITZMANN, Tim (1) SIGL, Georg (1,2) | 1: Technical University of Munich, Germany; 2: Fraunhofer Institute for Applied and Integrated Security, Germany |
113 | Equivalence Checking of System-Level and SPICE-Level Models of Linear Analog Filters | COŞKUN, Kemal Çağlar | 1: University of Bremen, Germany; 2: DFKI GmbH, Germany |
133 | ML-based Power Estimation of Convolutional Neural Networks on GPGPUs | METZ, Christopher A. (1) GOLI, Mehran (1,2) DRECHSLER, Rolf (1,2) | 1: Institute of Computer Science, Universität Bremen, Germany; 2: Cyber-Physical Systems, DFKI Bremen, Germany |
137 | On the optimization of Software Obfuscation against Hardware Trojans in Microprocessors | CASSANO, Luca (1) LAZZERI, Elia (1) LITOVCHENKO, Nikita (1) DI NATALE, Giorgio (2) | 1: Politecnico di Milano, Italy; 2: Univ. Grenoble Alpes, CNRS, Grenoble INP, TIMA, France |
Paper ID | Paper Title | Authors | Organisation(s) |
169 | Scalable FPGA hardware accelerator for SVM inference | AFTOWICZ, Marcin (1) LEHNIGER, Kai (1) LANGENDOERFER, Peter (1,2) | 1: IHP - Leibniz Institute for High Performance Microelectronics, Frankfurt (Oder), Germany; 2: BTU CS - Brandenburg University of Technology Cottbus-Senftenberg, Germany |
170 | Identifying Critical Flip-flops in Circuits with Graph Convolutional Networks | LU, Li (1) CHEN, Junchao (1,2) ULBRICHT, Markus (1) KRSTIC, Milos (1,2) | 1: IHP-Leibniz-Institut für innovative Mikroelektronik, Germany; 2: University of Potsdam, Potsdam, Germany |
171 | Verification of Calculations of Non-Homogeneous Markov Chains Using Monte Carlo Simulation | REZNICEK, Jan; KOHLIK, Martin; KUBATOVA, Hana | Czech Technical University in Prague, Czech Republic |